1. Field of the Invention
The present invention relates to a computer system using a core logic chipset to interface a central processor(s) (CPU), an accelerated graphics port (AGP) video processor, and input-output peripherals to a system memory, and more particularly, in optimizing the performance of the central processor(s), AGP video processor and input-out peripherals with the computer system memory by using a programmable system memory access arbiter in the core logic chipset.
2. Description of the Related Technology
Use of computers, especially personal computers, in business and at home is becoming more and more pervasive because the computer has become an integral tool of most information workers who work in the fields of accounting, law, engineering, insurance, services, sales and the like. Rapid technological improvements in the field of computers have opened up many new applications heretofore unavailable or too expensive for the use of older technology mainframe computers. These personal computers may be stand-alone workstations (high end individual personal computers), desk-top personal computers, portable lap-top computers and the like, or they may be linked together in a network by a "network server" which is also a personal computer which may have a few additional features specific to its purpose in the network. The network server may be used to store massive amounts of data, and may facilitate interaction of the individual workstations connected to the network for electronic mail ("E-mail"), document databases, video teleconferencing, white boarding, integrated enterprise calendar, virtual engineering design and the like. Multiple network servers may also be interconnected by local area networks ("LAN") and wide area networks ("WAN").
A computer system has a plurality of information (data and address) buses such as a host bus, a memory bus, high speed expansion buses such as an Accelerated Graphics Port (AGP) bus, a Peripheral Component Interconnect (PCI) bus, and other peripheral buses such as the Small Computer System Interface (SCSI), Extension to Industry Standard Architecture (EISA), and Industry Standard Architecture (ISA). The processor(s) of the computer system communicates with main memory and with the peripherals that make up the computer system over these various buses.
A significant part of the ever increasing popularity of the personal computer, besides its low cost relative to just a few years ago, is its ability to run sophisticated programs and perform many useful and new tasks. Personal computers today may be easily upgraded with new peripheral devices for added flexibility and enhanced performance. A major advance in the performance of personal computers (both workstation and network servers) has been the implementation of sophisticated peripheral devices such as video graphics adapters, local area network interfaces, SCSI bus adapters, full motion video, redundant error checking and correcting disk arrays, and the like.
The peripheral devices' data transfer speeds are achieved by connecting the peripheral devices to the microprocessor(s) and associated system random access memory through high speed expansion local buses. Most notably, a high speed expansion local bus standard has emerged that is microprocessor independent and has been embraced by a significant number of peripheral hardware manufacturers and software programmers. This high speed expansion bus standard is called the "Peripheral Component Interconnect" or "PCI." A more complete definition of the PCI local bus may be found in the PCI Local Bus Specification, revision 2.1; PCI/PCI Bridge Specification, revision 1.0; PCI System Design Guide, revision 1.0; PCI BIOS Specification, revision 2.1, and Engineering Change Notice ("ECN") entitled "Addition of `New Capabilities` Structure," dated May 20, 1996, the disclosures of which are hereby incorporated by reference. These PCI specifications and ECN are available from the PCI Special Interest Group, P.O. Box 14070, Portland, Oreg. 97214 (hereinafter referred to as "the PCI Specification").
Increasingly inexpensive but sophisticated microprocessors have revolutionized the role of the personal computers by enabling complex applications software to run at mainframe computer speeds. The latest microprocessors have brought the level of technical sophistication to personal computers that, just a few years ago, was available only in mainframe and mini-computer systems. Some representative examples of these new microprocessors are the "PENTIUM," "PENTIUM PRO" and PENTIUM II (registered trademarks of Intel Corporation). Advanced microprocessors are also manufactured by Advanced Micro Devices, Cyrix, IBM, Digital Equipment Corp., Sun Microsystems and Motorola.
These sophisticated microprocessors have, in turn, made possible running complex application programs using advanced three dimensional ("3-D") graphics for computer aided drafting and manufacturing, engineering simulations, games and the like. Increasingly complex 3-D graphics require higher speed access to ever larger amounts of graphics information stored in memory. This memory may be part of the video graphics processor system, but, preferably, would be best (lowest cost) if part of the main computer system memory because shifting graphics information from local graphics memory to main memory significantly reduces computer system costs when implementing 3-D graphics. Intel Corporation has proposed a low cost but improved 3-D graphics standard called the "Accelerated Graphics Port" (AGP) initiative. With AGP 3-D, graphics data, in particular textures, may be shifted out of the graphics controller local memory to computer system main memory. The computer system main memory is lower in cost than the graphics controller local memory and is more easily adapted for a multitude of other uses besides storing graphics data.
The proposed Intel AGP 3-D graphics standard defines a high speed data pipeline, or "AGP bus," between the graphics controller and system main memory. This AGP bus has sufficient bandwidth for the graphics controller to retrieve textures from system memory without materially affecting computer system performance for other non-graphics operations. The Intel 3-D graphics standard is a specification which provides signal, protocol, electrical, and mechanical specifications for the AGP bus and devices attached thereto. This specification is entitled "Accelerated Graphics Port Interface Specification Revision 1.0," dated Jul. 31, 1996, the disclosure of which is hereby incorporated by reference (hereinafter referred to as "the AGP Specification"). The AGP Specification is available from Intel Corporation, Santa Clara, Calif.
A major performance/cost enhancement using AGP in a computer system is accomplished by shifting texture data structures from local graphics memory to main memory. Textures are ideally suited for this shift for several reasons. Textures are generally read-only, and therefore problems of access ordering and coherency are less likely to occur. Shifting of textures serves to balance the bandwidth load between system memory and local graphics memory, since a well-cached host processor has much lower memory bandwidth requirements than does a 3-D rendering machine; texture access comprises perhaps the single largest component of rendering memory bandwidth, so avoiding loading or caching textures in local graphics memory saves not only this component of local memory bandwidth, but also the bandwidth necessary to load the texture store in the first place, and, further, this data must pass through main memory anyway as it is loaded from a mass store device. Texture size is dependent upon application quality rather than on display resolution, and therefore may require the greatest increase in memory as software applications become more advanced. Texture data is not persistent and may reside in the computer system memory only for the duration of the software application, so any system memory spent on texture storage can be returned to the free memory heap when the application concludes (unlike a graphic controller's local frame buffer which may remain in persistent use). For these reasons, shifting texture data from local graphics memory to main memory significantly reduces computer system costs when implementing 3-D graphics. The AGP bus is capable of functioning in both a 1.times. mode (264 MB/s peak) and a 2.times. mode (532 MB/s peak). The AGP bus is defined as a 32 bit bus, and may have up to four bytes of data transferred per clock in the 1.times. mode and up to eight bytes of data per clock in the 2.times. mode. The PCI bus is defined as either a 32 bit or 64 bit bus, and may have up to four or eight bytes of data transferred per clock, respectively. The AGP bus has additional sideband signals which may be used to transfer address information, leaving the AD bus free for just data transfers. Thus the AGP bus allows more efficient block data transfers then is possible using the PCI bus which must alternate between transferring address and data information on its AD bus. An AGP bus running in the 2.times. mode with sideband signals provides sufficient video data throughput (maximum of 532 MB/s peak) to allow increasingly complex 3-D graphics applications to run on personal computers.
The AGP bus bandwidth required for video data throughput, however, places a burden on the performance of the system memory in relation to the other computer system agents (CPU, PCI, AGP, SCSI, etc.) also needing access to the system memory. Memory access requests from the computer system agents and memory refresh cycles may occur concurrently. A memory access arbiter determines which and in what order the system agents are granted memory accesses. The memory access arbiter, in conjunction with the memory interface control logic, also controls memory refresh cycles which may occur every 15.625 microseconds. The memory access arbiter is located in the computer system core logic chipset, and must grant accesses to the system memory so that no system agent is starved from lack of timely access thereto. If memory accesses are granted arbitrarily, however, increased latency times and decreased computer system performance may result.
Since AGP is a new technology, it is difficult to determine in advance the load an AGP agent will place on the computer system memory, or how the AGP memory accesses may affect the memory access efficiencies of the other system agents (CPU, PCI, etc.). In addition, a core logic chipset may be used across multiple product lines (i.e., workstations, servers, desktop PCs, portables, and the like), thus it is difficult to develop a fixed or hard wired memory access arbiter optimized for the different combinations of system agents used in the various types of computer systems. Also, different types of software programs such as graphics intensive, computation intensive or data transfer intensive program activities may affect the memory access requirements of the different system agents.
What is needed is a system, method and apparatus for improving computer system performance by optimizing system memory accesses of the computer system agents in a variety of computer system applications.